My American Sister Types “b” on My Phone

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How many years of human effort show up to deliver one letter.

One letter, eight bits

My sister in the US types a single lowercase b. On my screen in Malaysia it appears in about 150 milliseconds. That is the whole event.

In UTF-8 that letter is one byte: 01100010. Eight bits. The smallest unit of meaning you can send a person who is not standing next to you.

To move those eight bits roughly 13,000 kilometres — across land, under an ocean, through the air in my living room — she borrows about 182 years of accumulated human engineering and a measurable slice of the global power grid. She does not notice any of it. That is the point of good infrastructure, and also the reason nobody ever thanks anyone for it.

So let’s count what she’s actually using.

Now give her a Tier 1 connection

Here’s where it gets interesting. Suppose my sister isn’t on ordinary home wifi. Suppose she’s inside some US institution with a direct line into a Tier 1 backbone — the top of the internet’s food chain, the networks that reach every other network without paying anyone for transit.

Shortcut, right? Fewer middlemen, fewer dependencies, fewer people to thank?

No. The list gets longer.

Tier 1 access removes commercial intermediaries — her retail ISP, a couple of transit providers in the middle. It then adds institutional ones: BGP peering agreements, the default-free zone, whatever cryptographic standards her clearance level mandates, the policy layer deciding what she’s allowed to send in the first place. She trades a few companies for a few treaties. Net dependencies: up.

And the floor doesn’t move at all.

Light in silica glass travels at roughly 200,000 km/s — about two-thirds of its speed in vacuum, because glass has a refractive index of about 1.47. Over 13,000 km that is 65 milliseconds, one way, minimum. That number is set by Maxwell’s equations and the material properties of fused quartz. It does not negotiate. No clearance level, no budget, no priority flag moves it.

So what does Tier 1 actually buy her? It strips out queuing delay, router hops, and congestion — maybe 180 ms down to 110 ms.

One hundred and eighty-two years of human engineering, mobilised to save her fifty milliseconds.

Part 1: the six epochs stacked inside one b

Trace every technology that letter needs and you’re stacking six distinct eras, spanning nearly two centuries.

EraSinceYearsWhat it contributes
Discrete coding1844182Morse and Vail make a letter into a code, not a sound
Submarine cable1858168The first transatlantic cable proves an ocean can be spanned
Solid-state electronics194779Transistor, then MOSFET — her phone, the servers, the repeaters, my SoC
Information theory194878Shannon proves any message survives a noisy channel as error-corrected bits
Photonics1960–197066Laser plus low-loss silica fibre: photons replace electrons
Packet switching1969–198357ARPANET and TCP/IP turn isolated networks into one routed mesh
Wireless and crypto1990s–2018~30802.11 and WPA3 get the bits through my wall

Two corrections to the version of this story you usually hear.

The ancestor is 1844, not 1858. The cable was the plumbing; Morse code was the idea. Turning a letter into a discrete, transmissible symbol is the conceptual leap everything else refines. Shannon formalised it a century later, but the move was already made.

It’s the MOSFET, not the transistor of 1947. The 1947 Bell Labs device was a bipolar junction transistor. What’s actually switching inside her phone and mine is the MOSFET — Mohamed Atalla and Dawon Kahng, Bell Labs, 1959. Every FinFET and gate-all-around device at 3nm today is that 1959 idea, scaled. The BJT gets the famous photograph; the MOSFET does the work.

Now the version with the training wheels off

Everything above is the tourist route. Here is the same b, traced at the level where I actually work: bitcells, sense amplifiers, charge pumps, constellation diagrams, matchlines.

The journey has six stages, and the OSI model is not a tidy stack here — it is a thing the packet gets wrapped in and unwrapped from repeatedly, by different silicon, in different clock domains.

StageSiliconOSI layers
1CPU die: SRAM caches, DRAM, crypto engine7, 6, 5, 4, 3
2Wi-Fi NIC die: SerDes, FIFO, CAM, WPA3 engine2
3RF PHY: baseband DSP, PLL, mixer, PA1
4Router, GPON, BGP core2, 3
5Submarine coherent DWDM1
6Landing station, taps, destination1 through 7 again

Note what happens at the boundaries. The b is encrypted twice — TLS 1.3 at Stage 1, WPA3 on top at Stage 2 — and the outer layer is stripped five metres later by my router. It spends the ocean crossing protected by exactly one of those two.

Also note that the b changes physical form four times: charge in a bitcell, voltage on a differential pair, a microwave wave in free space, a photon stream in glass. Each conversion is a place where something can go wrong, and a place where someone can listen.

Stage 1: the b as charge

Before any network exists, the letter is charge states across FinFET or gate-all-around nanosheet transistors. It lives in four different kinds of memory on its way out of her phone, and the choice of memory type at each point is a real engineering decision, not an accident.

Register file — 8T SRAM, 1R1W

When the TLS library runs its AES rounds, the 128-bit plaintext block and the 256-bit symmetric key sit in vector registers built from 8T bitcells or master-slave flip-flops.

Why 8T and not the denser 6T? Because the two extra transistors form a decoupled read stack. The read bitline never touches the internal storage nodes Q and QB. In a 6T cell, reading means pulling the wordline high and letting the precharged bitline fight the cell through the pass gate — which momentarily lifts the 0 node above ground and eats into the static noise margin. That is read disturb, and at low VDD it flips bits.

Decoupling the read port kills read-disturb SNM degradation entirely and lets you do one read and one write in the same sub-nanosecond cycle. You pay about 30% area. In a register file running at 4 GHz with crypto state in it, you pay it happily.

L1/L2/L3 cache — 6T SRAM, and the sense amplifier does the real work

As the browser builds the HTTP/2 frame and wraps it into a TLS record, the bytes sit in 64-byte cache lines inside 6T arrays: two cross-coupled CMOS inverters (PU1/PD1, PU2/PD2) plus two NMOS pass gates (PG1, PG2).

The read is the part people skip, and it is the most interesting circuit in the phone:

  1. Both bitlines BL and BLB are precharged to VDD (around 0.75 V at this node) and equalised.
  2. The row decoder drives the wordline high — often with a boosted wordline assist to overcome the pass gate’s threshold drop.
  3. If the stored bit is 0 (Q low, QB high), BL starts discharging through PG1 and PD1 against the bitline parasitic, which is tens of femtofarads.
  4. We do not wait for a full rail-to-rail swing. The moment a differential of roughly 50–80 mV develops, the sense-enable pulse fires the cross-coupled latch sense amplifier and it snaps to full logic levels.

That 50–80 mV figure is not arbitrary. It has to clear the local threshold-voltage mismatch between the two halves of the sense amp, which follows Pelgrom’s law:

σ(ΔV_th) = A_VT / √(W · L)

Smaller devices mean worse matching. As W and L shrink, sigma grows, and the required differential cannot shrink proportionally — which is exactly why sense amplifier offset has become one of the hard limiters on SRAM scaling, and why we burn area on offset-cancelling sense amp topologies.

On the write side, deep sub-micron nodes need negative bitline or VDD collapse write assist: you briefly drag the 0 bitline below ground to boost the pass gate’s gate-source voltage, because otherwise a strong PMOS pull-up wins and the cell refuses to flip.

So: the letter b is read out of cache as an 80-millivolt difference between two wires, amplified by a latch that was deliberately built mismatch-tolerant. That is the first thing anyone should know about how computers actually work.

Main memory — 1T1C DRAM

The kernel’s TX ring buffer descriptors and the socket buffer payload spill into LPDDR5X. One transistor, one capacitor, 10–20 fF of charge on a trench or stacked cap, leaking continuously, refreshed every 32–64 ms.

The entire letter is a few electrons on a capacitor that forgets unless reminded sixteen thousand times a second.

Non-volatile — EEPROM, SPI NOR flash, OTP eFuse

Where does the NIC get its burned-in MAC address, its PCIe vendor and device IDs, its RF power-amplifier gain and IQ-mismatch calibration tables, and its regulatory TX power limits?

Floating-gate or charge-trap cells on the NIC module, programmed by Fowler-Nordheim tunnelling or hot-carrier injection, plus OTP eFuses for root-of-trust keys. At power-on reset the NIC’s microcontroller runs boot ROM, reads those cells over SPI, and loads the values into internal configuration SRAM.

Security note, since this is my other job: that boot path is a supply-chain and persistence target. The MAC address is not a hardware fact, it is a value read from rewritable non-volatile memory into a register. Anything that can write that flash owns the device’s identity, below the operating system, across reinstalls. The eFuse root of trust exists precisely because the flash cannot be trusted.

Stage 2: crossing into the NIC, and the metastability problem

The kernel has wrapped TCP and IPv4 around the TLS record. The driver writes the physical DRAM address into the TX ring buffer and hits the MMIO doorbell register over PCIe. Now the b leaves the CPU die.

The SerDes and its CDR PLL

The PCIe transaction crosses differential board traces at 8–16 GT/s. There is no clock wire. The receiving PHY recovers the clock from the data edges using a clock-and-data-recovery PLL, typically driven by an Alexander bang-bang phase detector — a binary early/late decision rather than a linear phase error.

This is the first PLL in the story and nobody ever mentions it. There are at least four more before the letter reaches my screen.

Dual-port SRAM FIFO, and why Gray code exists

The NIC’s DMA engine pulls the socket buffer out of host DRAM into an on-chip TX packet FIFO built from true dual-port 8T SRAM.

Why dual-port? Because the two sides run on different clocks with no fixed phase relationship: Port A (write) on the PCIe clock domain, say 250 MHz; Port B (read) on the 802.11 MAC/PHY domain, say 160 MHz, derived from the RF crystal.

The read and write pointers have to be compared across that boundary to evaluate FULL and EMPTY. If you pass a binary counter across, multiple bits change at once — 0111 to 1000 — and the receiving flip-flops may sample mid-transition and latch a value that was never real. That is metastability, and its resolution time is unbounded; you only get a mean time between failures:

MTBF = e^(t_r / τ) / (T₀ · f_clk · f_data)

The fix is two things stacked. Gray-code counters, so exactly one bit changes per increment and a mis-sample yields either the old or the new value, never a corrupt third one. Then two-flip-flop synchronisers, which buy resolution time and push MTBF out to years.

Your letter sits in that FIFO for a few hundred nanoseconds, waiting for a clock domain it has never met.

One-cycle key lookup: the CAM

Now the 802.11 MAC engine needs the encryption key for this peer. A Wi-Fi NIC holds dozens of live keys at once — a PTK per unicast peer, a GTK for broadcast, an IGTK for protected management frames under 802.11w.

Software would search a list. The silicon does not search. It uses a content-addressable memory: a 6T cell augmented with a 4-transistor XNOR comparison circuit tied to a precharged matchline.

Here is the trick, and it is lovely. You drive the peer’s BSSID onto the searchlines. Every row whose stored value differs in even one bit turns on a pull-down and discharges its matchline to 0. The one row that matches keeps its matchline high — and that high line directly asserts the wordline of the adjacent key SRAM row holding the PTK.

Lookup time: one clock cycle, regardless of table size. The cost is power — every matchline in the array precharges and discharges on every search — which is why CAM is used where it must be and nowhere else.

AES-CCMP and the CRC

The MAC hardware runs the whole L3 + L4 + L6 bundle through a pipelined AES-CCMP or GCMP engine, built from Galois-field GF(2⁸) S-box combinational logic or masked ROM tables.

It prepends a 24-byte 802.11 MAC header, adds an 8-byte CCMP header carrying a 48-bit packet number, encrypts, appends an 8-byte MIC, then streams the frame through a 32-bit LFSR with generator polynomial 0x04C11DB7 to append the CRC-32 frame check sequence.

The letter is now encrypted twice. TLS 1.3 on the inside, from Stage 1. WPA3 on the outside, from here. The outer wrapper will survive exactly five metres.

Stage 3: Layer 1, where my thesis turns out to matter

The double-encrypted frame now enters the baseband and RF PHY, to leave the antenna at 5745 MHz — Wi-Fi channel 149, U-NII-3.

Baseband DSP

Scrambler. A 7-bit LFSR whitens the bitstream. Long runs of identical bits would put a DC component into the analog path and starve the clock recovery at the far end of transitions.

FEC. An LDPC encoder adds parity. Shannon’s 1948 result from Part 1 is not an abstraction here; it is a block of gates.

256-QAM mapping. Every 8 bits split into a 4-bit in-phase word and a 4-bit quadrature word, each mapping onto 16 amplitude levels: ±1, ±3, ±5, ±7, ±9, ±11, ±13, ±15. Sixteen by sixteen, 256 points in the constellation.

IFFT. Those symbols are assigned to subcarriers and run through a pipelined radix-2/radix-4 IFFT engine, reading twiddle factors from on-chip LUT ROM and ping-ponging transpose stages between SRAM banks. For a 20 MHz channel that is a 64-point transform carrying 52 used subcarriers; at 80 MHz it is 256-point with 234 data subcarriers.

A cyclic prefix is prepended — a copy of the symbol’s tail glued to its front. This is the single most elegant idea in OFDM: it turns the linear convolution of the multipath channel into a circular one, so wall reflections arriving late smear into the guard interval instead of into the next symbol. Inter-symbol interference becomes a per-subcarrier complex multiply to undo.

Two 12-bit current-steering DACs, binary-weighted current mirrors switching at roughly 160–320 MS/s, turn the sample streams into analog I(t) and Q(t).

The fractional-N sigma-delta synthesiser

To upconvert, we need a clean 5745 MHz local oscillator from a 40 MHz TCXO. Here is why that is hard and how it is solved.

Why not integer-N. With integer-N you need a reference that divides evenly into 5745 MHz. The greatest common divisor forces the reference down to 5 MHz, giving N = 1149. Two things break. Loop bandwidth must stay under about f_ref/10, so it collapses to 500 kHz, too slow to suppress VCO noise. And in-band phase noise scales as 20·log(N), so going from N = 143.625 to N = 1149 costs:

20 · log₁₀(1149 / 143.625) = 20 · log₁₀(8) ≈ 18 dB

Eighteen decibels of phase noise, thrown away for nothing.

The fractional-N fix. Keep the reference at the full 40 MHz and make the divide ratio fractional:

f_LO = f_ref × (N_int + K) = 40 MHz × 143.625 = 5745 MHz

N_int = 143, K = 0.625. But a divider can only divide by integers. So a MASH 1-1-1 third-order sigma-delta modulator dithers the multi-modulus divider every 25 ns, swinging the instantaneous ratio across 140 to 147 such that the time average is exactly 143.625.

That dithering is quantisation noise, deliberately introduced. The point of MASH is where it puts it:

NTF(z) = (1 − z⁻¹)³

Third-order high-pass shaping, +60 dB/decade — the noise is pushed up out of the band where the loop filter can crush it. You trade in-band noise for out-of-band noise, then build a filter that eats the out-of-band noise. That is the entire idea, and it is why your phone can sit on any channel without a bank of crystals.

PFD and charge pump. A three-state phase-frequency detector compares rising edges of the reference and the divided feedback clock. It carries a deliberate reset delay of roughly 150 ps so both UP and DN fire briefly even at lock — this eliminates the dead zone, the region near zero phase error where neither output is wide enough to drive the charge pump and loop gain collapses into jitter.

The charge pump uses cascoded current-steering PMOS source and NMOS sink mirrors with an op-amp replica bias loop, plus digital trim from calibration SRAM, to hold I_up = I_down across the whole V_tune compliance range. Mismatch here folds sigma-delta noise back in-band and throws reference spurs. This is where fractional-N designs are won or lost.

Loop filter. Third-order passive. R₂ in series with C₂ gives the stabilising zero at ω_z = 1/(R₂C₂) for phase margin; C₁ in parallel kills ripple; an extra R₃C₃ pole adds another −20 dB/dec to crush the shaped quantisation noise.

LC-VCO. V_tune drives accumulation-mode MOS varactors for fine continuous tuning, alongside a binary-weighted switched MIM cap bank set by an automatic frequency calibration FSM at channel switch — the bank keeps K_VCO small, and small K_VCO means less noise injected through the tuning line.

f₀ = 1 / (2π · √(L · (C_var + C_bank + C_par)))

A cross-coupled NMOS/PMOS negative-g_m pair cancels the series loss R_p of the thick top-metal spiral inductor to sustain oscillation.

In practice the VCO often runs at 2×f_LO, around 11.49 GHz, then goes through a CML divide-by-2 latch loop. Two reasons: the divider generates exact 0°/90°/180°/270° quadrature phases, and running the tank away from the TX frequency avoids injection pulling from the +20 dBm power amplifier sitting a few hundred microns away on the same die.

Why a PLL thesis is secretly a networking thesis

Here is the connection that makes this whole post worth writing.

In 256-QAM the constellation points are packed tight. Integrated PLL phase noise — described by Leeson’s model — appears as rotational jitter of every symbol in the constellation. Each point smears along an arc instead of sitting still.

Integrate the phase noise spectrum to get RMS jitter, and that maps near-directly onto error vector magnitude:

θ_rms = √( 2 · ∫ L(f) df )     from f₁ to f₂

EVM_rms ≈ θ_rms   (in radians)

802.11 requires about −32 dB EVM for the top 256-QAM rate. That is roughly 2.5% error vector, which works out to a phase jitter budget on the order of 0.5°–0.8° RMS. Blow that budget and the receiver cannot tell adjacent constellation points apart. The rate adaptation algorithm drops you to 64-QAM, then 16-QAM.

So: the loop filter component values determine how fast the internet is. Phase noise in a charge pump, integrated over offset frequency, becomes a lower throughput number in a speed test. A circuit decision at the femtofarad level surfaces as a user-visible megabits-per-second.

Out of the antenna

A double-balanced Gilbert cell quadrature mixer does the upconversion:

s(t) = I(t)·cos(ω_LO·t) − Q(t)·sin(ω_LO·t)

Then on-chip balun, Doherty power amplifier, BAW filter, T/R switch, quarter-wave antenna. The letter b leaves the phone as a 100-milliwatt electromagnetic wave and stops being an electrical signal at all.

Stage 4: five metres later, the outer encryption dies

The router’s antenna catches microvolts. Low-noise amplifier, Gilbert mixer down to baseband with the same 5745 MHz LO (generated by its own fractional-N PLL — that’s three so far), SAR or pipeline ADC, FFT, demodulate, de-interleave, LDPC decode.

Then the router decrypts WPA3. This is the part people get wrong about link-layer encryption: it is hop-by-hop, not end-to-end. The outer wrapper that was applied in the phone’s MAC silicon is stripped twelve feet away by a plastic box on a shelf. Everything beyond this point is protected by TLS alone.

NAPT, and the first TCAM

The router strips the 802.11 header and rewrites the source address. The private address and port become the public WAN address and a mapped port, and the translation state goes into a CAM or TCAM table so the return packet can be matched in one cycle.

This table is also, incidentally, the reason most home networks are accidentally firewalled: an unsolicited inbound packet has no matching state entry, so it has nowhere to go. Security by side effect of address exhaustion.

Onto glass, locally

The GPON optical network terminal drives a 1310 nm DFB laser upstream into a passive optical splitter — no power, no electronics, just a fused fibre coupler — up to the Tier 2 operator’s line terminal.

Note what GPON means for a threat model: downstream, the medium is shared. Every ONT on that splitter receives every downstream frame and is trusted to ignore the ones not addressed to it. AES on the downstream is what keeps that honest.

Longest prefix match, and the second TCAM

At the core router, the destination IP has to be matched against a routing table with close to a million prefixes, and the most specific match wins. A /24 beats a /16. Doing that in software is a trie walk with many memory accesses per packet; at line rate it is impossible.

So: ternary CAM, where each cell stores 0, 1, or X (don’t care). A prefix like 175.139.0.0/16 is stored as 16 bits of value followed by 16 bits of X. Every entry is compared in parallel in one cycle, and a priority encoder picks the longest match.

TCAM is one of the great unsung pieces of silicon. It is also enormously power-hungry and expensive per bit, which is why routing table growth is a hardware budget problem and not just an abstraction — and why BGP table bloat is a real operational threat, not a theoretical one.

The lookup selects the next hop toward AS3356 — Lumen — one of the handful of networks that reaches the entire internet through peering alone, buying transit from nobody. The Tier 1 fact from earlier in this post, now a concrete entry in a ternary memory array.

MPLS labels get pushed, held in an SRAM label forwarding table, and the packet is handed to the optics.

Stage 5: thirteen thousand kilometres of glass

The letter is now a modulated light wave in the C-band, around 1550.12 nm — a specific channel on the ITU 100 GHz grid, one of eighty or more wavelengths multiplexed down the same fibre strand.

Coherent optics

Modern submarine systems do not just blink the light on and off. They use dual-polarisation coherent modulation — QPSK or 16-QAM independently on two orthogonal polarisation states of the same wavelength, with both amplitude and phase carrying information.

The receiver mixes the incoming signal against a local oscillator laser and recovers the full complex field, then undoes chromatic dispersion and polarisation-mode dispersion in DSP rather than in optics. This is the same constellation mathematics as the 256-QAM in Stage 3, running at 1550 nm instead of 5.745 GHz. Same ideas, different physics, orders of magnitude apart in frequency.

And the phase noise constraint reappears: coherent detection of 16-QAM needs a narrow-linewidth laser for exactly the reason Wi-Fi needs a low-jitter PLL. The constellation rotates if your reference wanders.

The amplifier that makes oceans possible

Every 80 km the signal passes through an erbium-doped fibre amplifier. A 980 nm pump laser excites Er³⁺ ions in a doped fibre segment into a metastable state; the incoming 1550 nm signal stimulates emission, and the signal is amplified as light — no conversion to electricity, no regeneration, no per-channel electronics.

That last part is why it changed everything. An EDFA amplifies the whole DWDM comb at once. Add forty more wavelengths and the same amplifier carries them. Before this, every added channel meant a new electronic regenerator in a pressure vessel on the seabed.

Powering the seabed

The repeaters need electricity. It comes from shore: roughly 10,000 volts DC pushed down the copper conductor surrounding the fibre core, from power feeding equipment at both landing stations, in series through every repeater across the ocean, with the two ends sharing the load and sea earth as the return path.

Hundreds of kilowatts, continuous, for decades, through a cable the thickness of a garden hose lying in the dark at crushing pressure.

The b crosses in about 65 milliseconds. The infrastructure carrying it has been running continuously since before it was typed and will keep running long after.

Stage 6: who can see the b, and what they actually get

At a landing station, a fibre can be tapped passively with a fused biconical taper splitter — typically 90/10. Ten percent of the light is diverted, the other ninety continues. It is a piece of drawn glass. No electronics, no insertion of anything active, no latency change worth measuring, and from the traffic’s point of view nothing happened at all.

That is a physics-layer intercept, and the honest thing to say about it is that it is publicly documented as having existed: the AT&T Folsom Street facility in San Francisco, described in 2006 by technician Mark Klein, had exactly this arrangement feeding a separate room. Upstream collection at network junctions has since been legislated around, litigated over, and partially acknowledged under FISA Section 702. What is not publicly established is the current scope — which cables, which stations, continuously or on demand. Anyone who tells you precisely is either guessing or shouldn’t be telling you.

So treat what follows as a threat model, not a claim about any specific cable: if a passive tap exists on the path, here is what it gets.

What the tap sees

The diverted light hits an InP photodiode, a transimpedance amplifier, a very fast ADC, and an FPGA doing TCAM-based packet filtering at line rate. Then:

LayerVisible?What it gives up
L3 IPv4/IPv6Fully plaintextBoth endpoints, and so both parties’ approximate location and ISP
L4 TCP/UDPFully plaintextPorts, sequence numbers, flags, connection lifetime
TLS handshakePartly plaintextVersion, cipher suites, certificate (in TLS 1.2), and the SNI
TLS record payloadOpaqueAES-256-GCM under ECDHE, increasingly with ML-KEM-768 hybrid
Packet sizes and timingAlways visibleMore than people think — see below

The SNI leak is the big one and it is routinely glossed over. In TLS 1.3 the certificate is encrypted, which is a genuine improvement over 1.2. But the Server Name Indication in the ClientHello is sent before any key agreement completes, in plaintext, because the server needs it to choose which certificate to present. Unless Encrypted Client Hello is in use — and deployment is still partial — a passive observer learns exactly which service you are talking to, just not what you said. For most threat models that is the majority of the intelligence value.

And now the part that is specific to one letter

Here is why a single b typed live is a worse case than a paragraph pasted.

An interactive session sends each keystroke as its own packet, immediately. Encryption hides the content and pads the size a little, but it does not hide when the packet left. Inter-keystroke timing is a biometric: the latency between characters depends on which keys they are and where your fingers are.

This is not speculative. Song, Wagner and Tian showed in 2001 that inter-keystroke timings in an encrypted SSH session leak enough to substantially reduce the search space for typed passwords. The underlying problem has never fully gone away; it resurfaces in web apps, video calls, and messaging apps that send per-keystroke typing indicators.

So the honest accounting for the live b:

  • Content: protected. AES-256-GCM is not being broken by anyone in the window that matters.
  • Who, when, how long, how often: fully exposed at L3/L4.
  • Which service: exposed via SNI, unless ECH is active.
  • Typing rhythm: exposed, and more informative than most people assume.

The defensive read: an adversary who cannot break your cryptography attacks your metadata, your endpoints, or your humans. That is the standard conclusion of this analysis and it holds here. The b is safe. The fact that she typed it, at that moment, to that service, from that place, at that cadence, is not.

And a tap at the landing station is the expensive way to learn all of that. The cheap way is the device at either end.

The same path, read as an attack surface

Every layer above is a capability. Read the same list sideways and each one is also an exposure. This is the view I find hard to switch off once you have it.

LayerAttack surfaceWhat actually defends it
SRAM bitcellRowhammer-class disturb, cold-boot remanence, fault injection flipping a cell mid-cryptoECC, refresh policy, fast zeroing, masked crypto datapaths
Crypto datapathPower and EM side channels — AES keys recovered from the current signature of the switchingConstant-time implementations, masking, noise injection, shielding
NIC flash/EEPROMFirmware implant below the OS; MAC and calibration tables are writable values, not factsSigned firmware, OTP eFuse root of trust, measured boot
Clock domain crossingClock and voltage glitching around synchronisers; marginal timing as a fault-injection targetSynchroniser depth, clock integrity monitors, brownout detection
Key CAMKey extraction via the power profile of matchline discharge; search-pattern leakageSecure key partitions, keys never readable by firmware
WPA3 / L2Downgrade to WPA2, rogue AP, evil twin, deauth into forced reassociationSAE, 802.11w protected management frames, pinned upper layers
RF PHYJamming, selective-subcarrier interference, injection pulling, RF side channels from the PASpectrum monitoring, FEC margin, physical separation of tank and PA
NAPT / routerDefault credentials, exposed management plane, UPnP hole-punching, DNS hijackSegmentation, management VLAN, DoH or DoT, firmware discipline
BGP / Tier 1Prefix hijack and route leaks — the least-defended layer in this entire postRPKI origin validation, ROAs, peer filtering, route monitoring
Submarine cablePhysical cutting, landing-station access, passive optical tapRoute diversity, end-to-end crypto that assumes the fibre is hostile
TLS 1.3SNI leakage, CA compromise, harvest-now-decrypt-laterECH, certificate transparency, post-quantum hybrid key exchange
EndpointEverything. The screen renders plaintext.Device security — the only layer that can lose the whole game

Three things fall out of reading it this way.

The weakest link is not the cryptography. It is BGP. The protocol deciding where packets go was designed in 1989 on the assumption that networks tell the truth about which addresses they own, and route hijacks still happen at meaningful scale. AES-256 does not help if the route takes your traffic somewhere interesting on the way.

The physics layers are defended mostly by economics, not by controls. Tapping a submarine cable is possible. It is also expensive, physically awkward, and needs access to specific buildings. Much of this path is secured by the cost of attacking it — a real control, but a fragile kind, and one that erodes as the attacker gets richer.

Harvest-now-decrypt-later changes the shape of the problem. A passive tap costs almost nothing to keep running and storage is cheap. Traffic captured today and undecryptable today is a bet on a cryptanalytic or quantum advance later. That is precisely why ML-KEM-768 is being hybridised into TLS handshakes now, rather than when a cryptographically relevant quantum computer exists. The defence has to ship years before the attack does.

Part 2: the energy ledger

Energy in telecoms is measured in joules per bit. Below is the rough toll for one b across five hops.

These are order-of-magnitude estimates, not measurements. They come from published figures for device classes, pro-rated down to a single byte. Treat them as “roughly this many zeros,” not as a bill.

HopWhereEnergy for one byte
1Her phone’s SoC switching~10 nanojoules
2US datacentre routing it~50 nanojoules
3Trans-Pacific fibre and repeaters~500 nanojoules
4My Malaysian router’s power amp~10 microjoules
5My phone’s radio front end~10–50 microjoules

Hop 2 deserves a correction to the version of this story that circulates. If she’s on a modern messenger, the server does not decrypt the message. End-to-end encryption means the datacentre terminates the TLS tunnel, looks at the routing envelope, and forwards an opaque blob it cannot read. It is a very expensive postal sorting office that never opens the letter.

The last five metres cost more than the Pacific

Look at that table again and the shape of it is absurd.

Crossing 13,000 km of ocean floor: ~500 nanojoules. Crossing my living room: 10,000 to 50,000 nanojoules. The final five metres burn roughly a thousand times more energy than the entire trans-Pacific journey.

The reason is the medium. Inside a fibre, the photon is guided — total internal reflection keeps it in a glass pipe, and its energy stays where you put it. Losses are so low that one amplifier every 80 km is enough.

The moment that signal leaves my router’s antenna, it stops being guided and becomes a wave expanding into open space. Power density falls off with the square of distance. Almost all of what the router transmits goes into my walls, my furniture, my cat, and the sky. My phone catches a vanishingly small fraction and then spends real energy dragging a signal back out of the noise.

So the hardest part of sending a letter from America to Malaysia is not the ocean.

It’s the air.

The thank-you list

Roughly in order of how much weight each one carries.

WhoWhenWhat the b owes them
Samuel Morse, Alfred Vail1844Made a letter a discrete code instead of a sound
Michael Faraday, James Clerk Maxwell1831, 1865The electromagnetism the entire stack sits on
Cyrus Field and the 1858 cable crews1858Proved an ocean could be crossed
Bardeen, Brattain, Shockley1947The transistor
Mohamed Atalla, Dawon Kahng1959The MOSFET — what’s actually in both our phones
Claude Shannon1948The b as eight error-correctable bits over a noisy channel
Charles Kao; the Corning team1966, 1970Low-loss optical fibre
Emmanuel Desurvire, David Payne1987The erbium-doped fibre amplifier
Vint Cerf, Bob Kahn1974TCP/IP
Yakov Rekhter, Kirk Lougheed1989BGP
Diffie, Hellman, Merkle; Daemen, Rijmen1976, 1998Public-key exchange and AES

Two worth pausing on.

Desurvire and Payne are the most unsung names here. Before the EDFA, crossing an ocean meant converting light back to electricity, regenerating the signal, and converting it back — at every repeater, in a sealed box on the seabed, forever. The EDFA amplifies the light as light. Without it there is no trans-Pacific internet. Most people who use one daily have never heard of either man.

Rekhter and Lougheed matter especially in the Tier 1 version of this story. “Tier 1” is not a marketing tier or a contract — it’s a BGP fact. A Tier 1 network is one that reaches the entire internet through peering alone, buying transit from nobody. My sister’s privileged access is, quite literally, a statement about routing tables. Her clearance is a protocol artifact.

And it still doesn’t beat 65 milliseconds.

All of that, for one b

So here is the final bill for eight bits.

One hundred and eighty-two years of accumulated engineering. An 80-millivolt differential on a bitline, resolved by a latch built to tolerate its own mismatch. A pointer crossing two clock domains in Gray code so it cannot land on a value that was never real. A matchline finding one key among dozens in a single cycle. A third-order sigma-delta modulator dithering a divider across 140 to 147 so a crystal that only knows 40 MHz can produce 5745 MHz, held steady to within half a degree of phase so a constellation point stays where the receiver expects it. Erbium ions in a glass fibre on the ocean floor, pumped at 980 nm, amplifying light as light under ten thousand volts fed from a shoreline. A ternary memory array matching a prefix against a million others in one cycle to pick a next hop.

Every one of those is a field somebody spent a career inside.

And a Tier 1 connection on top, which buys about fifty milliseconds and adds a few more institutions to the list of people she is depending on.

All of it converging on one outcome: I see my American sister type b.

She will type the rest of the word in a second. Lol.


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